A packet-processing device, like a switch microchip, usually needs to buffer the packets into a packet memory (PM) having one or more banks while the device processes them. The current solution to store the packet in the device's packet memory is to assign multiple chunks (called pages) of packet memory to each packet, rather than a single big chunk. With this scheme, the packet is not stored consecutively in the banks of the packet memory, but rather scattered in one or more pages that together form a link list of pages that map throughout multiple banks of the packet memory. Further, a plurality of these banks (and the pages that map to them) are able to be logically grouped into pools (of banks and the associated pages). Therefore, the linked list of all the pages that a particular packet uses in the packet buffer needs to be maintained in the switch (in the buffer manager or BM); this linked list is traversed when the packet is read out of the packet buffer for transmission. Each page has associated a state that contains some information about the page.
The state of all the pages in the packet processor device is maintained in the switch. A packet has associated a descriptor or token that among other fields contains the pointer to the first page. With this initial pointer, all the pages used by the packet can be retrieved in the same order they were used to store the incoming packet by traversing the link list built with the next-page pointers of the different page states. As a result, a linked list of all the pages (and therefore banks) that a particular packet uses is maintained in the switch and is then traversed to locate and read out the packet from the packet memory for transmission.